KL720 Bootstrap config concern

Son NguyenSon Nguyen
in KL720 related discussion

Dear Sir,

I am designing with KL720 269-Ball SOC. I have some wonders regarding to bootstrap configures.

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Could you give me more detail about the BOOT_IPL_SEL setting? What is XIP mode? ROM is SPI Nand Flash ex: W25N01GVZEIG, right?

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Could you give me more details about the BOOT_SPL_SEL[1:0] setting? If I bring up new board at the first time with a blank/empty SPI flash. could I program Firmware to SPI Flash through USB 3.0 or UART interface with this BOOT_SPL_SEL[1:0] setting?

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Comments

  • warrenwarren

    Hi,

    As you know, there are two boot strap configurations:

    1. IPL:Initial Program Loader
      1. Boot from ROM:his means the system boots by loading the initial program from the built-in ROM (Read-Only Memory). ROM is a permanent storage medium, typically containing essential software for hardware initialization and basic operating system loading. This is the standard boot process for most hardware devices. Normally, this is what we use in 99% of the applications.
      2. Boot from SPI NOR (XIP mode): SPI NOR generally refers to a type of fast, non-volatile memory chip accessible via a Serial Peripheral Interface (SPI). XIP (Execute In Place) mode allows the system to execute code directly from the SPI NOR memory without having to load the program into RAM.
    2. SPL:The SPL (Secondary Program Loader) is an integral part of the boot process for many embedded systems. It is typically responsible for initializing hardware and loading a more complex bootloader.Here's an explanation of each mode:
    3. SPL is specified by UART: In this mode, the SPL is transferred to the device through a UART (Universal Asynchronous Receiver/Transmitter) connection. This is commonly used during development or debugging processes, allowing developers to send the SPL directly from a host computer to the device. For example, in the KL720, we use JLINK with KeilC. It's particularly useful for initial hardware bring-up or for systems that do not have a permanent storage solution yet installed.
      1. SPL is located in SPI NOR flash: In this configuration, the SPL is stored in an SPI (Serial Peripheral Interface) NOR flash memory.
    4. SPL is located in SPI NAND flash: Here, the SPL is stored in SPI NAND flash, which is generally cheaper and offers higher density storage than NOR flash, but does not support XIP. This means the SPL must be read from the NAND flash and loaded into RAM before execution. This mode is often used in systems where larger storage capacity is needed and the cost needs to be minimized.
      1. SPL from USB: In this mode, the SPL is loaded from a connected USB device. For example, with the KL720 connected to a host via USB, the SPL is not stored in KL720's flash but in the host's flash or other storage devices like eMMC. During booting up of KL720, the host needs to transfer the SPL via USB.

    In general, we usually use the KL720's ROM as the IPL. For the SPL, we initially use UART and a PC tool (Keil) during development, and then, once the development is successful, we can burn it to NAND flash and select 'boot from SPI NAND'

  • Son NguyenSon Nguyen

    Thanks Warren.

    Could you describe the role of the JTAG interface? Is It needed for bring-up board?

    Because we are designing a small device such USB stick, due to the board space so limited and we need to know what is necessary interface for program/debug/bring up board and route them to header/test point. Could we remove the JTAG from below debug header?

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  • warrenwarren

    Hi Nguyen,

    J-Link

    J-Link is a family of debugging tools provided by SEGGER Microcontroller, designed to work with JTAG and other debug protocols. J-Link is widely used in the embedded systems industry for debugging and programming microcontrollers from various manufacturers.

    Features of J-Link:

    • High Speed: Provides high-speed debugging and programming capabilities.
    • Compatibility: Supports a wide range of microcontrollers from different manufacturers.
    • Software Support: Comes with J-Link software and integrates with popular IDEs (Integrated Development Environments) like Eclipse, Keil, and IAR.

    here's the link for it:

    SEGGER - The Embedded Experts - Downloads - J-Link / J-Trace

    I'm not sure about the purpose of the 'USB stick.' However, for programming and debugging, I recommend reserving the UART0/JTAG interface.

    If you're concerned about board space, you can reserve just the KL720_JTAG_TMS and KL720_JTAG_TCK pins. J-Link supports SWD (Serial Wire Debug) mode. I've also attached the connection details for J-Link SWD mode for your reference.



  • Son NguyenSon Nguyen
    https://www.kneron.com/forum/discussion/comment/1717#Comment_1717

    HI Warren,

    "In general, we usually use the KL720's ROM as the IPL. For the SPL, we initially use UART and a PC tool (Keil) during development, and then, once the development is successful, we can burn it to NAND flash and select 'boot from SPI NAND'"

    That means the KL720 IC from the factory has programmed a default ROM that initial common interfaces (UART, USB, JTAG, SPI Flash ) before it has been shipped to the user, right?

    In bring-up process, could we burn the FW image to blank NAND FLash through KL720's UART or JTAG or USB interface?

  • Ethon LinEthon Lin

    Hi Nguyen,

    It's possible to burn the KL720 FW image to blank flash through UART and JTag (JLink), but you need to set the HW setup to change bootstrap to UART mode before burning by UART. The Jlink would be the easier way to access flash.

    To use USB to program flash, there should be corresponding FW to handle the USB programming protocol, so it is not available to burn FW image to blank flash through USB.

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