Digital IC Designer
工作內容
- Maintain or design new IP function blocks based on architecture specification or new feature request
需求條件
1. Bachelor's degree in Electrical Engineering or Computer Science.
2. Experience in digital IP design using Verilog or SystemVerilog.
3. Solid design skills in synchronous design, asynchronous design, low-power design, and debugging.
Preferred qualifications:
1. Master's degree in Electrical Engineering or Computer Science.
2 .Experience with chip tapeout and mass production.
3. Solid understanding of complete SoC design flow and design techniques and methods
4. Experience in one or more of the following domains, is a plus
- High-Level Synthesis using SystemC
- Synopsys HAPS, Xilinx FPGA
- LPDDR
- AXI, AHB design
- Neural network
2. Experience in digital IP design using Verilog or SystemVerilog.
3. Solid design skills in synchronous design, asynchronous design, low-power design, and debugging.
Preferred qualifications:
1. Master's degree in Electrical Engineering or Computer Science.
2 .Experience with chip tapeout and mass production.
3. Solid understanding of complete SoC design flow and design techniques and methods
4. Experience in one or more of the following domains, is a plus
- High-Level Synthesis using SystemC
- Synopsys HAPS, Xilinx FPGA
- LPDDR
- AXI, AHB design
- Neural network
工作地點
Taipei, Hsinchu